Table 2: MIPS registers and the convention governing their use.
The MIPS (and SPIM) central processing unit contains 32 general purpose registers that are numbered 0-31. Register n is designated by $n. Register $0 always contains the hardwired value 0. MIPS has established a set of conventions how the registers should be used. These suggestions are guidelines, which are not enforced by the hardware. However a program that violates them will not work properly with other software. Table 2 lists the registers and describes their intended use.
Registers $at (1), $k0 (26), and $k1 (27) are reserved for use by the assembler and operating system.
Registers $a0-$a3 (4-7) are used to pass the first four arguments to routines (remaining arguments are passed on the stack). Registers $v0 and $v1 (2, 3) are used to return values from functions. Registers $t0-$t9 (8-15, 24, 25) are caller-saved registers used for temporary quantities that do not need to be preserved across calls. Registers $s0- $s7 (16-23) are callee-saved registers that hold long-lived values that should be preserved across calls.
Register $sp (29) is the stack pointer, which points to the
first free location on the stack. Register $fp (30) is the
frame pointer.
Register $ra (31) is written with the return address
for a call by the jal instruction.
Register $gp (28) is a global pointer that points into the middle of a 64K block of memory in the heap that holds constants and global variables. The objects in this heap can be quickly accessed with a single load or store instruction.
In addition, coprocessor 0 contains registers that are used for exception handling. SPIM does not implement all of these registers, since they are not of much use in a simulator (or are part of the memory system). However, it does provide the following:
These registers are part of coprocessor 0's register set and can be accessed by the lwc0, mfc0, mtc0, and swc0 instructions.