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# Arithmetic and Logical Instructions

## TAL arithmetic and logical instructions generally require 3 register operands, except for multiply and divide. TAL provides separate immediate instructions when one of the operands is a constant. The TAL immediate instructions are: Notes: I specifies an immediate bit field within the instruction. , are general registers. Superscripts indicate repetitions of a binary value. Subscripts indicate bit positions (Little-Endian) of sub-field. Square brackets ([ ]) indicate "contents of." While TAL includes all MAL arithmetic and logical instructions in register mode, not all operations are available in immediate mode. For example, there is no immediate subtract operation. Instead, the addi instruction is used with the additive inverse. There is also no TAL move instruction. The MAL instruction ` move \$R, \$S` is equivalent to the TAL instruction: ` add \$R, \$0, \$S` There is no nor instruction for immediate operands in TAL and no not instruction in any form. The not operation can be performed using xor with a mask of all 1's. The TAL shift instructions with constant shifts are identical to the MAL shift instructions. TAL has separate shift instructions for the case where the shift is also specified by a register operand. These instructions have the same mnemonic with the suffix 'v' added. The variable shift instructions all have three register operands. Notes: I specifies an immediate bit field within the instruction. , , are general registers. Superscripts indicate repetitions of a binary value. Subscripts indicate bit positions (Little-Endian) of sub-field. Square brackets ([ ]) indicate "contents of." MAL multiply and divide instructions actually require 2 TAL instructions. The TAL multiply instruction: ` mult \$R, \$S` multiplies the contents of registers \$R and \$S and places the 64 bit result in two special registers, HI and LO. HI contains the most significant 32 bits of the product and LO contains the least significant 32 bits. TAL instructions are provided to move data between the HI/LO registers and the general registers. The mflo (move from LO) and mfhi (move from HI) instructions move data from the LO and HI registers, respectively, to a general register. For example, the MAL multiply instruction: ` mul \$8, \$9, \$10` is synthesized with two TAL instructions: ``` mult \$9, \$10 mflo \$8``` Overflow will never occur since any product of two 32 bit numbers can be represented in 64 bits or less. However, the product may be too large to fit in the LO register alone. The HI register must be checked to detect overflow. TAL has a single divide instruction, div, that computes both the integer quotient and remainder. The quotient is left in LO and the remainder in HI. The MAL divide instruction: ` div \$8, \$9, \$10` is synthesized with two TAL instructions: ``` div \$9, \$10 mflo \$8``` The MAL remainder instruction: ` rem \$8, \$9, \$10` is written in TAL as: ``` div \$9, \$10 mfhi \$8``` The TAL multiply and divide instructions are shown below: Notes: HI and LO are special registers. , , are general registers. Superscripts indicate repetitions of a binary value. Subscripts indicate bit positions (Little-Endian) of sub-field. Square brackets ([ ]) indicate "contents of." TAL includes separate instructions for signed 2's complement arithmetic and for unsigned arithmetic. The unsigned instructions perform the same operations as the signed operations but overflow conditions are ignored. The unsigned instructions have the suffix 'u' added to the signed instruction mnemonic. When a signed instruction produces overflow due to an arithmetic operation, an error condition called an exception is generated. The exception causes an error handling procedure to be called. The unsigned instructions never cause exceptions.

Next: Branch Instructions Up: TAL Previous: MAL vs. TAL

CS 301 Class Account
Mon Dec 1 23:34:28 AST 1997