Southgate: Current Design and Future Possibilities
Intel designed the PCI (Peripheral Control Interface) in the early
1990s as a general replacement for the MCA (Micro Controller Interface)
and EISA (Extended Industry Standard Architecture). In it's definition
as a standard was the inclusion of the Southbridge just north of the
PCI bus (the thought being that PCI was at the equator or center of the
computer architecture). Originally connected to the Northbridge over
another PCI bus and dealing only with PCI devices, over time it evolved
in to a general purpose hub with a proprietary connection (called Quick
Path Interconnect on Intel systems).
The Southbridge chip on modern systems connects to all of the slower
devices that need to interact with the much faster Northbridge or DMA
(Direct Memory Access) chips and finally the CPU.
- PCI cards: The standard proprietary output line has been dropped
in favor of Direct Media Interface (DMI), a separate bus (and an
evolution of PCI-E) connecting the North and Southbridges designed for
- Graphics Card: Depending on system this may be attached to either
the North or South bridge. If connected through the Southbridge it uses
the same DMI connection as the PCI cards. Some Southbridge chips have
an internal graphics card for reduced power usage and cost.
- Internal sound card: To reduce cost and power usage some/many
Southbridges come with integrated soundcards.
- Internal network card: If an internal network card is present it
is connected through a hard wired PCI connection and appearing as
another PCI device.
- Internal Storage (IDE/SATA): Transferred over the DMI, not to be
confused with media readers (SD cards, Memory Sticks, Compact Flash)
which are mostly attached through USB and connected to the LPC
- Low Resolution Timers, BIOS Rom, PS/2, USB 1.0-2.0, Firewire,
Floppy Disk Drive, TPM: All much slower devices are handled through the
LPC (Low Pin Count interface). This is a separate chip designed to be
simple and small, but much slower then even the Southbridge. It
connects directly to the Southbridge and sends it's data along the
- USB 3.0: New boards that support USB 3.0 have moved it's control
from the LPC directly to the Southbridge, facilitating access to the
DMI and faster throughput speeds.
- PIC/APIC: While not a separate device itself, the (Advanced)
Programmable Interrupt Controller is located on the Southbridge also.
This send a signal to the CPU whenever a particular trigger has been
activated (ex. a keyboard key pressed, the mouse has been moved, a
timer has triggered). The original IRQ system is also handled by the
- Realtime Clock: The system clock is connected to the Southbridge
and the current time is passed off to the DMA every second.
- ACPI: The Advanced Configuration and Power Interface enables
different power saving features of the motherboard and connected
systems and is controlled through the Southbridge.
- SMBus (System Management Bus): Motherboard bus designed to talk
to other small motherboard objects (temperature sensors, fan
- High Resolution Timers: Designed to be very precise within the
1-100 ms range.
With the Intel Sandy Bridge CPU the Northbridge has been consumed into
the CPU and this too may eventually happen to the Southbridge.
Alternatively it could merge with the LPC creating one "slower than the
CPU" chip. Or it might still keep going as it is, serving as an I/O
Controller and interface with all of the much slower peripherals with
the faster ones talking to the Northbridge.