Graphics card designed to compete against ATI/Nvidia.
Release date late 2009/2010.
Uses x86 architecture.
Based on the Pentium P54C chip. (Pentium 1 to you and me)
4-way simultaneous threading per core due to keeping 4 copies of each register.
32 KB integer / 32 KB float L1 cache per core.
256 KB L2 cache per core.
512 bit vector processing unit, per core ( 16 floats at a time ). Think extra wide SSE.
Fully programmable graphics pipeline.
Expected to have 32 cores at launch.
Cache coherency across all the cores.
Explicit cache control for the programmer.
1024 bit ring bus, 512 bit each way.
Built with 45 nm process.
Clock rate expected to be around 2.6 GHz.
Very little graphics hardware, most operations performed in software.
P54C is super-scalar but doesn't do out of order execution.
5 stage pipeline (or close to it).
Can run programs from DirectX, OpenGL or Larrabee Native Programming Language ( C/C++ with a new compiler).
Note the drop off in performance gain after 32 cores.
Brian Paden (author)