Course Review for Final Exam

• Digital and analog circuits.  What they look like.  How they work.  When one is better than the other.
• Analog circuit simulation via SPICE.  Resistors, transistors, voltage sources.  Current and voltage in circuits (V=IR, I=V/R).  Simple resistor-resistor, resistor-transistor voltage divider circuits.
• Digital circuit simulation via VHDL.  Concurrent execution.  Component instantiation.  Sequential "process" blocks and "wait" semantics.  VHDL synthesis.
• Assembly language/instruction set design: opcode fields, register bits. 
  
• RISC: MIPS, PowerPC
• CISC: x86
• Stack-based: x86 floating-point, Java Virtual Machine
  
• CPU design: fetch, decode, execute (and the circuitry that implements this!)
• Pipelining: why and how, performance analysis
  
• Dependencies: RAW, WAR, WAW, and pipeline "stalls"
  
• Superscalar execution
• CPU cache: tags, direct-mapping, associativity, writeback policy.  Code transformations to improve cache utilization.
  
• Floating-point numbers.  Sign, exponent, mantissa.  Roundoff.  Denormal numbers, and how to repair them.
• x86 floating-point instructions and stack-based machines.
  
• SSE instructions, SSE intrinsics.  SSE performance profile.
• User-level threads, pthread mechanics (thread creation/deletion, locks).
• "race" conditions, and how to fix them.
• Intel Threading Building Blocks and the hard problem of load balancing.
• MPI basic execution environment (many "main" programs), basic send/recv communication.
• Parallel communication cost model (alpha + beta * N)
• High per-message cost, and how to live with this
  
• Theoretical models for computation cost / communication cost, speedup (serial time / parallel time)
• Load imbalance: how to measure, how to fix
• OpenMP basic execution environment.
• Choosing between pthreads, OpenMP, MPI.