True division, as specified by the IEEE FPS, is very similar to division using scientific notation. The steps to perform floating point true division are:
In the first step, the dividend mantissa is extended to 48 bits by adding 0's to the right of the least significant bit. When divided by a 24 bit divisor, a 24 bit quotient is produced.
The exponent arithmetic is performed by negating the exponent of the divisor and then adding, as in floating point multiplication. The negative of a bias-127 number is formed by complementing the bits and adding -1 (1111 1111) in 2's complement.
As in floating point multiplication, overflow and underflow occur when the difference of the exponents is outside the range of the bias-127 exponent representation. Special representations are employed for these cases: E = 255 and M = 0 for overflow and E = 0 for underflow.
Floating point division by zero is undefined and has a special representation in which E = 255 and M is nonzero. This value is called Not A Number, or NaN.