6th generation CPU comparison
Paul Hsieh's guide to the AMD K6, Intel Pentium II, and Cyrix 6x86MX.
Discusses the pipelines and architecture of those chips.
7th generation CPU comparison
Paul Hsieh's guide to the AMD K7, Intel's Willamette (which became the Pentium IV), and the TransMeta Crusoe architectures. Discusses the pipelines and architecture of those chips.
Covers Itanium 2 details, among other things. Also has many good links to further articles.
Paul Hsieh's Assembly Language Lab
Examples of hand optimizing code and algorithms for speed. Usually beats the compiler by a large amount, but not always.
Intel's Itanium Microprocessor
A history of Itanium, followed by an overview of the features of the architecture. Not very technical about the architecture itself — just the coding features.
Optimizing Assemble Code
Agner Fog's page has the download for how to optimize Pentium (Plain, MMX, Pro, II, and III) Assembly code. This file has what you need for writing code that executes in as few clock cycles as possible.
Branch Prediction in the Pentium Family
Agner Fog's write-up of exactly how the Pentium processors do their branch prediction.
As it claims, "The world's leading source for pure technical x86 processor information."
CPU and Chipset Guide
Links to all of arstechnica's articles on CPU's and chipsets. The best place to start looking for more information. Has the links to the next two articles.
RISC vs. CISC
Amazing article detailing RISC, CISC, and what came next. Especially useful is the section “Post-RISC architectures and the current state of the art”.
Preview of Intel's IA-64 (Itanium)
Just what it says. A good article.