6th generation CPU comparison
http://www.azillionmonkeys.com/qed/cpuwar.html
Paul Hsieh's guide to the AMD K6, Intel Pentium II, and Cyrix 6x86MX.
Discusses the pipelines and architecture of those chips.
7th generation CPU comparison
http://www.azillionmonkeys.com/qed/cpujihad.shtml
Paul Hsieh's guide to the AMD K7, Intel's Willamette (which became the Pentium IV), and the TransMeta Crusoe architectures. Discusses the pipelines and architecture of those chips.
Paul Hsieh's Assembly Language Lab
http://www.azillionmonkeys.com/qed/asmexample.html
Examples of hand optimizing code and algorithms for speed. Usually beats the compiler by a large amount, but not always.
Intel's Itanium Microprocessor
http://www.geek.com/procspec/features/itanium/
A history of Itanium, followed by an overview of the features of the architecture. Not very technical about the architecture itself — just the coding features.
Optimizing Assemble Code
Agner Fog's page has the download for how to optimize Pentium (Plain, MMX, Pro, II, and III) Assembly code. This file has what you need for writing code that executes in as few clock cycles as possible.
Branch Prediction in the Pentium Family
http://www.x86.org/articles/branch/branchprediction.htm
Agner Fog's write-up of exactly how the Pentium processors do their branch prediction.
Sandpile.org
As it claims, "The world's leading source for pure technical x86 processor information."
CPU and Chipset Guide
http://www.arstechnica.com/cpu/index.html
Links to all of arstechnica's articles on CPU's and chipsets. The best place to start looking for more information. Has the links to the next two articles.
RISC vs. CISC
http://www.arstechnica.com/cpu/4q99/risc-cisc/rvc-1.html
Amazing article detailing RISC, CISC, and what came next. Especially useful is the section “Post-RISC architectures and the current state of the art”.
Preview of Intel's IA-64 (Itanium)
http://www.arstechnica.com/cpu/1q99/ia-64-preview-1.html
Just what it says. A good article.